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#dec

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@revspace After a few days of work, implementing 3 missing libc functions, repairing an extra 4MB of RAM, hacking around toolchain issues, we finally got Lynx 2.8.2 compiled and running on the VAX-11/750 (in 4.3 BSD Quasijarus)! That means we got to browse the (non-HTTPS) web using no equipment or parts newer than 1986 this side of the network (besides the AUI 10Base-T phy).

"Reading Museum is hosting an exhibition marking more than 60 years since Digital Equipment Corporation (DEC) opened its first UK office...

The exhibition occupies much of the Sir John Madejski Art Gallery and, as well as some pre-DEC artifacts, has a range of hardware on show, from PDP racks and panels, through retro terminals, to VAX machines, a few of which still bear hopeful "Alpha ready" stickers. The walls show a timeline and quotes from the people involved, with screens to tell the story."

The one photo on that page makes me want to go!!!!

theregister.com/2025/03/22/dec

The Register · Museum digs up Digital Equipment Corporation's dusty digital equipmentBy Richard Speed

Hi all, we did our annual PDP-12 demo in Dr. Ted Pedersen's architecture class on Tuesday, and it went really well.

In cleaning up / reorganizing after showing off our artifacts, I realized that we have something that I haven't seen on @bitsavers, but I maybe just didn't know where to look. It's a big poster of PDP-12 instructions -- it's kind of like the pocket reference in poster format. It is about 9.5x30 inches (24x76 cm). I scanned it in two pieces on the office machine and stitched it together with GIMP. I'll try to make a PDF version with OCR text. @bitsavers #vintagecomputing #retrocomputing #pdp12 #pdp #dec #umdpdp12

Well @retrobytes goes very nerdy¹ about the DEC PDP-10 and builds a replica in the form of a PiDP-10 in an epic soldering montage.

He also waxes lyrical about the TOPS-10 OS for the PDP-10 and it's ancestry to CP/M, MS-DOS and via another route to Microsoft BASIC and a lot lot more more!

Connections going every which way that even James Burke would appreciate 😁

youtu.be/ybO6bPcRmlY

¹ Clearly the best kind of nerdy 🙂👌

youtu.be- YouTubeEnjoy the videos and music you love, upload original content, and share it all with friends, family, and the world on YouTube.

I'd been a member of #SDF for about a year or so when I posted to #BBoard to get rid of a load of 10-12 year old #DEC workstations and a server that my wife's ex left in his house. Someone responded, and we met down in Lewisville or somewhere. I don't know if that person was able to get them going. I have this hope/wish that they're still running somewhere and now 30ish-year-old computers living their lives.

Replied in thread

@jfmezei :How long are data blocks for each entry in the in-CPU cache? 64 bits ? 128 bytes ? 1 page ?

It varies. Most implementations will use one cache block size at a time at a given cache level, but that size and the size and the organization of the caches varies.

:Does this vary from architecture to architecture or even inside an architecture?

Yes. Alpha caching varied by processor and by implementation, all within the limits of the Alpha architecture.

:Is it totally transparent when writing at OS level?

Totally transparent? No.

Details, such as what was locally called word tearing, alignment, memory timing, and memory lock processing, all get involved.

Similar requirements can arise in apps.

There are a few other wrinkles I’d prefer to not meet again, too.

Mostly transparent? Yes.

:And in multi core with coherent caches, when a core does a write to RAM, does memory controller propagate this to all other cores in case they have it cached? or does memory controller know which core has what in cache and send only relevant updates?

It depends. Most of what I’ve met will mark the cache contents as being invalid, and will await the next opportunity to wait for main memory to load the data, or to wait for a load from L3, or such. I can’t recall ever working on a cache-coherent multiprocessor that tried to reload the cache everywhere.

Alpha could load cache speculatively, or explicitly, or evict as needed.

bitsavers.org/pdf/dec/alpha/sy

WP has a reasonable description, as well:

en.wikipedia.org/wiki/Cache_(c

Deeper still:

cs.swarthmore.edu/~kwebb/cs31/

More for amusement, figures 5 and 6 nicely show the shifting scale of the complexity of modern computer systems:

computer.org/csdl/journal/ts/2

#digitalequipment #dec
#alpha #computerarchitecture #retrocomputing