As was pointed out in our previous post, the root cause of approximately 70% of security vulnerabilities that Microsoft fixes and assigns a CVE (Common Vulnerabilities and Exposures) are due to memory safety issues.

Actually, the C in CVE stands for C.

@zacchiro i can't find the original source any more, but i think somebody made this for me

@robots @zacchiro everything in that article plays directly into Rust's strengths

to be honest, i'm not sure there's weaknesses that rust has that c++ hasn't got too, or where the c++ equivalent is a million times worse

@zacchiro it's like everyone is crying out for a safe systems programming language and Ada/SPARK is just there, staring at them from across the room.

@theruran It probably needs better marketing and some sort of angle for corporate capture of devs.

I think I've seen you mention Ada/SPARK a few times now. You've convinced me that I need to go back and revisit Ada. I haven't touched it since college.

@cstanhope @theruran Same. Just did one course 16 years ago but lately I'm increasingly interested in it.

@clacke @cstanhope that's awesome! 😁 the latest standard is 2012 and they are working on another for 2022, it appears.

I point folks to this talk: fosdem.org/2021/schedule/event

It shows Rust-style borrow checking using existing features of the language. More resources are shown at 44:15 in the video.

#Ada @ada_spark

@cstanhope @theruran It needs C syntax if you want it to become popular.

People (and corporations) have known about Spark for a long time. But, if you ask people why they don't like it, more often than not, they'll tell you, "iT's ToO mUcH lIkE PaScAl. eWwW!"

@vertigo @theruran That could be. Pascal was the second language I learned, and C my third. I suppose that may have inoculated me a little from that attitude. 😆

@cstanhope @theruran Fun fact, VHDL is basically Ada applied towards digital hardware simulation and synthesis.

It's on my bucket list to learn one of these days, and might even be a gateway drug to programming in Ada for other purposes too.

@vertigo I was going to mention VHDL as another one of those languages that't not C like, but I haven't written anything original in it in over 12 - 13 years now, and I thought I might be misremembering some of its characteristics. Verilog eventually won me over for basic FPGA development, but I believe VHDL would have advantages in other scenarios like system simulations. But now I'm dangerously close to exceeding what I remember, so I'll stop.

@cstanhope You're not too far from the truth; VHDL finds application in larger systems (generally, complex processor designs, multi-function ASIC design, etc.).

However, SystemVerilog (the latest evolution of Verilog which retains Verilog's basic syntax but has more VHDL-like features) is gaining in that field.

Honestly, though, more and more people are abandoning Verilog and VHDL and going with even higher-level languages (e.g., Scala in the form of Chisel, Python in the form of nMigen and Migen, etc.) and just compiling to Verilog as a kind of digital assembly language of sorts.

@vertigo That's what I'm seeing too, and it's definitely the direction I would like to go for my next "major" FPGA project. Probably nMigen or the like just due to my familiarity with Python. Although, I shouldn't dismiss Chisel just because I am completely unfamiliar with the Java world. Maybe it's not so bad to set up.

@cstanhope I had terrible luck with it. While setting it up posed some challenges, actually writing new code in it proved nearly impossible for me. A number of Scala language features just tripped me up to the point where I just gave up. E.g., "implicits." They combine the worst features of global variables and dynamically-scoped variables, and are inscrutable.

In the hands of a master, though, the hardware it generates is damn impressive. The best example I saw was an arbitrarily-sized cross-bar switch for a 64-bit TileLink interconnect in just 4 lines of code.

@vertigo Thanks for sharing your experience. Now I'm pretty sure my first foray into something higher level for FPGA synthesis should probably be based on a language I'm familiar with (warts and all). I'm sure there will be plenty of other problems to deal with without simultaneously learning a new programming language on top of it. 😆

@cstanhope @vertigo
Yes, it's terrible when something stops ``blinking'' and your first impulse is to look at that awful generated Verilog, rather than at the higher level source, because you are not well versed in the latter and just don't trust it:)

@cstanhope @vertigo The four genders of programming languages: Forth, Wirth, parens and curlies

@vertigo @cstanhope yeah.. I figure that partly explains Rust's success. Go, too.. I think it's a pleasure to read though, and it's conventional to use explicit and descriptive names.

Rust does look like some wizardshit

@theruran @cstanhope My biggest beef with Rust is all the punctuation. It really smacks of Perl, which I detest for its lack of readability. I generally like Rust otherwise.

My favorite language to read so far has to be Oberon and Modula-2. Even Ada falls behind somewhat because of its use of lowercase keywords. Clearly seeing the structure of the code stand out like a blinking neon sign is fantastic for someone whose eyesight is slowly starting to fade, like mine.

@vertigo @cstanhope Ada is case-insensitive so you can write all-caps keywords, afaik.

@theruran @cstanhope If it is case insensitive, then Prompt could also be spelled promPt as well, yes? It's not just the keywords which are case insensitive?

@theruran @zacchiro some good free tutorials would probably help.

The main introductory text is pretty expensive

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